Electronic equipment (such as, for example, television sets and other audio/video equipments) are commonly implemented using digital technology instead of analog technology. Typically, the more advanced the digital technology gets the more demanding the task of converting an analog signal to a digital signal suitable for the digital technology implementation becomes.
Conceptually, an analog-to-digital converter (also denoted ADC or A/D converter) is very well know in the art as well as its basic functionality (sample-and-hold, quantization) and will not be elaborated on further herein.
For high sampling frequencies it may be necessary or at least beneficial to use ADC structures comprising several constituent ADC:s to be able to accommodate the high sampling frequency. Such structures alleviate the processing speed requirements on each constituent ADC. Examples of such ADC structures are pipe-lined ADC:s and time-interleaved ADC:s (e.g. parallel successive ADC:s). US 2011/0304489 A1, WO 2007/093478 A1, EP 0624289 B1 and WO 2010/042051 A1 describe various example time-interleaved ADC structures.
In a typical implementation of a time-interleaved ADC (TI ADC) it is desirable to be able to accommodate various sampling frequencies of the digital output signal. On the other hand, it may be very cumbersome to design and verify a constituent ADC design for operation at different clock frequencies. Thus, it would be desirable to be able to use a constituent ADC implementation designed for a particular fixed clock frequency in a TI ADC structure and still enable provision of various sampling frequencies of the digital output signal.
Therefore, there is a need for flexible digital output signal sampling frequency time-interleaved analog-to-digital converters comprising constituent analog-to-digital converters designed for a particular fixed clock frequency.